SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREFOR

摘要

PURPOSE: To reduce junction electric field strength in a semiconductor region for a source and a drain of a field effect transistor. CONSTITUTION: A structure wherein a gate electrode 9 of a memory cell selecting MIS-FETQs of a DRAM is buried in grooves 7a and 7b cut in a semiconductor substrate 1 is provided. The radius of the curvature of a corner of the bottom part in the groove 7b is so designed that the corner is rounded corresponding to the subthreshold coefficient of the memory cell selecting MIS- FETQs. Further a gate insulating film 8 in the groove 7b has a lamination structure containing a thermal oxide film and a CVD film.