| 摘要 |
PURPOSE: To improve relieving efficiency by using a memory cell group for redundancy sharing one data transfer bus line for relieving plural defects, in a semiconductor memory. CONSTITUTION: In a semiconductor memory having a main storage section and a sub-storage section functioning as a cache memory and constituted so that bi-directional data transfer can be performed between the main storage section and the sub-storage section through a data transfer bus line, the device is provided with a redundant circuit relieving defect existing in a main storage section based on an address signal (sub-storage section column selection signal SYm) specified for a sub-storage section and an address (main storage section row selection signal DXn, bank selection signal BS) specified for the main storage section corresponding to the address.
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