发明名称 Device having metal interconnects with reduced or eliminated metal recess in vias
摘要 A semiconductor device having metal interconnects provides for a reduction of the recessing of metal in vias, particularly when the metal in the vias is aluminum or an aluminum alloy. The device includes a via in a device layer of the semiconductor device, a barrier layer formed over the device layer, and a metal layer formed over the barrier layer. The metal layer also fills the via to form a via structure. A portion of the metal layer is then removed and a remaining portion of the metal layer forms a conductive structure having a sidewall extending from a surface of the barrier layer. A spacer is formed along the sidewall of the conductive structure and a portion of the barrier layer is removed using the spacer to protect the via structure adjacent the surface of the device layer. In particular, the spacer protects a portion of the via structure that does not overlap with the conductive structure.
申请公布号 US2001017416(A1) 申请公布日期 2001.08.30
申请号 US20010850654 申请日期 2001.05.07
申请人 VLSI TECHNOLOGY, INC. 发明人 SENGUPTA SAMIT;ZHENG TAMMY
分类号 H01L21/768;(IPC1-7):H01L29/40;H01L23/48;H01L23/52 主分类号 H01L21/768
代理机构 代理人
主权项
地址
您可能感兴趣的专利