发明名称 Method for connecting substrates of a vertical, integrated circuit structure partitions a top substrate into a first subpart with a metallizing structure and a second silicon subpart with a circuit structure.
摘要 A top substrate (1) is partitioned into a first subpart (13) with a metallizing structure and a second silicon subpart (14) with a circuit structure. The metallizing structure contains metal strips (3) and source (4), gate (5) and drain (6) transistor connectors fitted contiguously on the silicon subpart corresponding to a transistor structure.
申请公布号 DE10008386(A1) 申请公布日期 2001.08.30
申请号 DE2000108386 申请日期 2000.02.23
申请人 GIESECKE & DEVRIENT GMBH 发明人 GRASL, THOMAS
分类号 H01L21/768;H01L23/48;(IPC1-7):H01L21/768;H01L23/538;H01L25/065;H01L21/336;H01L21/283 主分类号 H01L21/768
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