METHOD FOR CHECKING AND COMPENSATING TIMING PARAMETER OF SEMICONDUCTOR TEST SYSTEM USING SEMICONDUCTOR DEVICE UNDER TEST

摘要

PURPOSE: A method for checking and compensating a timing parameter of a semiconductor test system using a semiconductor device under test is provided to check and compensate a timing parameter by using a semiconductor device under test. CONSTITUTION: A clock delay value of a reference device of the same kind as a semiconductor device under test is measured(S50). The clock delay value is checked within a critical range of a timing parameter of the semiconductor device(S52). A correction value is outputted by using a difference between the measured clock delay value and a normal delay clock value when the clock delay value is not within a critical range of a timing parameter of the semiconductor device(S60). The timing parameter is corrected by using the corrected value(S62). The test for the same device of the reference device is performed continuously in lot units(S54).