发明名称 APPARATUS FOR DETECTING FREQUENCY OFFSET
摘要 <p>A delay unit 101 delays a received known symbol input into an AFC section by one symbol; a subtracter 102 subtracts the one-symbol delayed received known symbol from the received symbol; a delay unit 103 delays the input one-symbol delayed received known symbol by one symbol; a subtracter 104 subtracts two-symbol delayed received known symbol from the received symbol; phase detecting sections 105, 106 severally convert the subtraction results to phase angles to detect phase shifts; subtracters 108, 109 severally perform the subtraction processing of phase offsets from the phase shifts, a multiplier 110 multiplies the output of the subtracter 109 by 1/2; and an averaging section 111 averages the output of the subtracter 108 and the output of the multiplier 110 for an arbitrary interval. &lt;IMAGE&gt;</p>
申请公布号 EP1128620(A1) 申请公布日期 2001.08.29
申请号 EP20000944354 申请日期 2000.07.10
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 IDE, MINAKO
分类号 H04L27/01;H04L27/00;H04L27/22;(IPC1-7):H04L27/22 主分类号 H04L27/01
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