| 摘要 |
A method for fabricating floating gate semiconductor devices, such as flash EEPROMs, and flash EEPROM memory arrays, is provided. The method includes providing a semiconductor substrate and forming active areas on the substrate. Each active area includes elements of a field effect transistor (FET) including a source, a drain, a channel region, and a gate dielectric layer. Trench isolation structures are also formed in the substrate for electrically isolating the active areas. In addition, a conducive layer (e.g., polysilicon) is deposited on the active areas, and chemically mechanically planarized to an endpoint of the trench isolation structures to form self aligned floating gates on the active areas. Control gate dielectric layers, and control gates are then formed on the floating gates.
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