| 摘要 |
A digital audio processor includes a first logic unit reversing an enable signal, second logic unit reversing a data signal, a third logic unit receiving output signals from the first and second logic unit and outputting a logical NOR result, a fourth logic unit receiving an output signal from the second logic unit and the enable signal, a 5V tolerant circuit receiving output signal from the third logic unit and outputting signals depending upon an input voltage of a pad, a fifth logic unit reversing output from the fourth logic unit, a PMOS transistor coupled to a supply voltage and receiving an output signal from the 5V tolerant circuit, and an NMOS transistor connected serially to the PMOS transistor and a ground voltage.
|
