| 摘要 |
PURPOSE: A Y_address generator in a graphic memory is provided to increase the processing speed of a system by generating a normal_Y_address_enable signal(YSE) and a redundancy_Y_address_enable signal(YRE), by controlling a driver, thereby removing a delay factor generated from a signal transmission. CONSTITUTION: The first and the second input buffer unit(10a,10b) respectively buffer an external address signal(Ext_ADDR)£0:i| and input data(DI)£0:j|. The first and the second latch unit(20a,20b) latch an output of each input buffer unit(10a,10b). A counter(30) counts the output of the first latch unit(20a). A data signal generation unit(40) outputs the output of the second latch unit(20b). A free-decoder unit(50) decodes a data signal(cam)£0:7| of the data signal generation unit(40). An address comparison unit(60) compares the data signal with a redundancy_address signal(cra)£0:2|. A delay unit(70) delays a normal_Y_address_generation signal(YSEI). A driver(80) outputs a delay normal_selection signal(YSEOD). A Y_decoder unit(90) decodes outputs(RYSID,YSEOD) of the driver(80).
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