| 摘要 |
PROBLEM TO BE SOLVED: To substantially suppress the increase of power consumption in a standby state even in the case of accelerating a system clock. SOLUTION: Based on system clock signals CLK composed of a series of pulse strings and a clock activation signals CKE, an internal clock activation signal generation circuit 10 generates internal clock activation signals cke-c and latch signals cke1. An internal clock signal generation circuit 20 generates internal clock signals clk-in based on the internal clock activation signals cke-c and the system clock CLK. A CKE latch clock control signal generation circuit 30 generates CKE latch clock control signals cke-x for controlling the activation and inactivation of CKE latch clock signals based on the internal clock activation signals cke-c, the latch signals cke1, the system clock signals CLK and the clock activation signals CKE.
|
