发明名称 MEMORY CONTROLLER AND INFORMATION PROCESSOR AND MEMORY CONTROL CHIP
摘要 PROBLEM TO BE SOLVED: To solve the problems that even when a plurality of buffers are simply prepared, or the capacity is increased, sufficient effects can not be obtained, or the control is made to be complicated in quickening memory access by look- ahead in a conventional technique, and that performance is more damaged due to the execution of look-ahead in some cases. SOLUTION: In a memory controller 10 connected through a bus to bus masters 31 and 32 for controlling access to a memory 20, read buffers 11 and 12 for temporality holding the data read from the memory 20 are prepared just for the number of bus masters corresponding to the bus masters 31 and 32, and when a memory read request is received from the bus master 31 or 32, the requested data and the succeeding data are read from the memory 20, and preserved in the read buffer 11 or 12.
申请公布号 JP2001229074(A) 申请公布日期 2001.08.24
申请号 JP20000037908 申请日期 2000.02.16
申请人 NEC IBARAKI LTD 发明人 SUZUKI KOICHI
分类号 G06F12/02;G06F12/00;(IPC1-7):G06F12/02 主分类号 G06F12/02
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