发明名称 METHOD OF FORMING WIRING AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain highly reliable wiring which can cope with further scale down and a higher degree of integration by making desired fine wiring formable, by sufficiently securing not on the surface covering property of a plated Cu film, but also the adhesion between the Cu film and a base film, and a semiconductor device provided with the wiring. SOLUTION: At the time of forming fine multilayered Cu wiring by using both the dual damascene method and electroplating method, a base layer 14 composed of a material containing a metal having a high melting point, an intermediate layer 15 composed of Zr or a Zr compound, and a Cu seed layer 16 are formed by the CVD method so as to cover the internal wall surfaces of wiring grooves 12 and via holes 13 before the groove 12 and holes 13 are filled up with plated Cu. The Zr compound used for forming the intermediate film 15 is Zr N(C2H5)2}4.
申请公布号 JP2001230219(A) 申请公布日期 2001.08.24
申请号 JP20000041807 申请日期 2000.02.18
申请人 FUJITSU LTD 发明人 OTSUKA NOBUYUKI;SHIMIZU NORIYOSHI;SAKAI HISAYA
分类号 H01L21/288;H01L21/28;H01L21/285;H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):H01L21/288;H01L21/320 主分类号 H01L21/288
代理机构 代理人
主权项
地址