SYSTEM INCLUDING CPU AND CODE TRANSLATOR FOR TRANSLATING CODE FROM A SECOND INSTRUCTION SET TO A FIRST INSTRUCTION SET EXECUTABLE BY THE CPU

摘要

A system includes a CPU and a code translator. The CPU may execute instructions from a first instruction set, and the code translator may translate Java code sequences from Java bytecodes to code sequences having instructions defined in the first instruction set. The translated code sequences may be executed by the CPU. While Java is used as an example of instructions which the code translator translates, the code translator may translate instructions from any instruction set to instructions executable by the CPU. In one embodiment, the translated code sequences may be stored in an area of memory reserved for the code translator. Additionally, a table may be maintained which maps addresses of instructions in the untranslated code sequences (e.g. the Java code sequences) to addresses of translated code sequences in the reserved memory area. Thus, prior to activating the code translator to translate a code sequence, the table may be checked to determine if the code sequence has already been translated. If so, the translated code sequence may be executed instead of activating the code translator.