| 摘要 |
An integrated semiconductor memory having memory cells (MC) for storing data signals (DQ), has a memory sense amplifier (2) with an input (21) for a data signal (DQ) of one of the memory cells (MC), and an output (23) for at least one output signal (RD0). A driver circuit (3) is connected to the output (23) of the memory sense amplifier (2). The driver circuit (3) can be activated or deactivated only by the output signal (RD0) of the memory sense amplifier (2). A signal line (4) is connected to the driver circuit (3), a precharging circuit (5) and to a memory circuit (6). A terminal (7) for a control signal (C) is connected to the memory sense amplifier (2), the precharging circuit (5) and the memory circuit (6). As result of a driver circuit (3) which has a relatively low level of circuit complexity, the space requirements are kept relatively small. In addition, high switching speeds are made possible during the reading operation.
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