发明名称 Trench isolation method
摘要 A trench isolation method for a semiconductor device, wherein a capping layer formed of an insulating material fills a recess generated at a border edge between an active area and an inactive area. The border edge is defined by a trench filled with insulating material. Filling the recess suppresses defects of the semiconductor device. Reduction of the isolating ability, due to the formation of gate poly residue during the forming of a gate, is prevented. Reduction of the threshold voltage of a transistor, caused by electric field concentration due to the gate poly residue, is suppressed. An oxide layer is also provided which protects an nitride pad during a plasma process.
申请公布号 US2001015046(A1) 申请公布日期 2001.08.23
申请号 US20010842049 申请日期 2001.04.26
申请人 HONG SUG-HUN 发明人 HONG SUG-HUN
分类号 H01L21/762;(IPC1-7):E04B1/00 主分类号 H01L21/762
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