Lateral thyristor structure for electrostatic discharge prevention using CMOS technology has trough region and four highly doped regions, providing lower trigger voltage

摘要

The structure includes a semiconductor substrate (20) with a trough region (21). A first highly doped region (22) is applied to the surface of the substrate and connected to a first terminal (26). A second highly doped region (23) is applied in the trough region and connected to a second terminal (27). A third highly doped region (24) is applied in the trough region and connected to the second terminal and arranged between the first region and the second region. A fourth highly doped region (25) is applied to the surface of the substrate and in the trough region, and arranged above the pn junction formed between the substrate and the trough region and between the third highly doped region and the first highly doped region.