发明名称 |
STATE MACHINE, SEMICONDUCTOR DEVICE USING STATE MACHINE, AND METHOD OF DESIGN THEREOF |
摘要 |
A flexible and reliable state machine and a semiconductor device using the state machine are provided. A state machine includes a memory circuit (1), a comparator circuit (2), an analyzer circuit (3) and an arithmetic circuit (4). The memory circuit (1) receives and holds data (5-1a) indicative of the next state, and outputs it as data (5-1b) indicative of the present state. The comparator circuit (2) compares the data (5-2a) indicative of the present or next state and generates a state flag (6-2b). The analyzer circuit (3) decodes a state flag (6-3a) and generates the control signal (7-3b) for controlling operation of the arithmetic circuit (4). Based on a control signal (7-4a), the arithmetic circuit (4) operates on the data (5-4a) indicative of the present state and generates data (5-4b) indicative of the next state.
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申请公布号 |
WO0161464(A1) |
申请公布日期 |
2001.08.23 |
申请号 |
WO2001JP01051 |
申请日期 |
2001.02.14 |
申请人 |
LOGIC RESEARCH CO., LTD.;YAMANAKA, KEI |
发明人 |
YAMANAKA, KEI |
分类号 |
G05B11/01;G06F7/00;G06F9/02;G06F9/06;G06F15/177;G06F17/50;H03K19/173;(IPC1-7):G06F7/00 |
主分类号 |
G05B11/01 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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