FREQUENCY SYNTHESISER

摘要

A frequency synthesiser (50) comprising input means for receiving a reference frequency (FreF) and output means for providing a desired output frequency (fo). The synthesiser comprises further means (58) for dividing the desired output frequency by a plurality of divider values. The division is accomplished based on pre-generated control data for controlling the dividing of the desired output frequency by the divider values in accordance with the desired output frequency. The control data is stored in memory means (62) of the synthesiser.