发明名称 Semi-additive process (SAP) architecture for organic leadless grid array packages
摘要 A substrate which has a first conductive layer that is attached to a first dielectric layer. A second conductive layer is attached to the first dielectric layer. The second conductive layer may be a plated copper material that extends through a via opening of the dielectric and is attached to the first conductive layer. A third conductive layer is attached to the second conductive layer, including a sidewall of the third layer. A second dielectric can be attached to the third conductive layer. The third conductive layer may be a plated nickel-copper composition which improves the adhesion to subsequent layers in the substrate, particularly between the second dielectric and the sidewall of the second conductive layer.
申请公布号 US6278185(B1) 申请公布日期 2001.08.21
申请号 US19980085546 申请日期 1998.05.27
申请人 INTEL CORPORATION 发明人 MURALI VENKATESAN;ISHIDA KENZO;KAISER BRIAN A.;VAIDYANATHAN ANANT
分类号 H01L21/48;H05K3/10;H05K3/28;H05K3/38;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 主分类号 H01L21/48
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