| 摘要 |
An input-buffering device having an adjustable voltage divider circuit for generating a bias voltage signal capable of preventing the shifting of trigger point when different source voltages are applied. The adjustable voltage divider circuit has a pull-up circuit for controlling the value of threshold voltage and a variable resistor for generating a bias voltage. In addition, the input-buffering device has at least one transistor group for controlling the rate of increase of the trigger point. |
