发明名称 |
High selective nitride spacer etch with high ratio of spacer width to deposited nitride thickness |
摘要 |
A method of etching silicon nitride spacers beside a gate structure comprising: providing a gate electrode over a gate oxide layer on a substrate. A liner oxide layer is provided over the substrate and the gate electrode. A silicon nitride layer is provided over the liner oxide layer. The invention's nitride etch recipe is performed in a plasma etcher to anisotropically etch the silicon nitride layer to create spacers. The nitride etch recipe comprises a main etch step and an over etch step. The main etch step comprises the following conditions: a Cl2 flow between 35 and 55 molar %, a He flow between 35 and 55 molar %, a backside He pressure between 4 and 10 torr; and a HBr flow between 7.5 and 12.5 molar %; a pressure between 400 to 900 mTorr; at a power between 300 and 600 Watts. The etch recipe provides a spacer width to nitride layer thickness ratio of about 1:1 and does not pit the Si substrate surface.
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申请公布号 |
US6277700(B1) |
申请公布日期 |
2001.08.21 |
申请号 |
US20000480272 |
申请日期 |
2000.01.11 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
YU JIE;WU GUAN PING;PRADEEP YELEHANKA RAMACHANDRAMURTHY |
分类号 |
H01L21/311;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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