Digital signal processing memory logic unit using PLA to modify address and data bus output values

摘要

The inventive system and method provides a processing resource which performs bit reversing and Boolean algebraic operations. These operations are commonly needed by discrete transform algorithms to reorder data samples. By selectively remapping the address bus, a series of non-linear accesses to the data memory are converted to linear accesses. Another use of the invention to pack floating point numbers in memory is also disclosed. An embodiment using an in-circuit reprogrammable logic device is disclosed which allows processing software to dynamically reconfigure the mapping logic and rules.