发明名称 Method and apparatus for testing chips
摘要 Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).
申请公布号 US6277660(B1) 申请公布日期 2001.08.21
申请号 US20000497437 申请日期 2000.02.03
申请人 FRAUNHOFER-GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG E.V. 发明人 ZAKEL ELKE;ANSORGE FRANK;KASULKE PAUL;OSTMANN ANDREAS;ASCHENBRENNER ROLF;DIETRICH LOTHAR
分类号 G01R31/02;G01R1/073;G01R31/26;H01L21/48;H01L21/66;(IPC1-7):H01L21/26 主分类号 G01R31/02
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