发明名称 Method for filtering used in a digital phase locked loop
摘要 A filtering method for digital Phase Lock Loop, comprises: define an ideal phase difference value between an input clock and a local recovery clock; calculate a phase difference between the input clock and the local recovery clock by a subtractor; compare the phase difference with the ideal phase difference value to adjust the local recovery clock in order to keep it phase difference stables in the ideal phase difference value. When adjusting the local recovery clock, taking the ideal phase difference value as a center, the phase difference is divided into different segments. For segment where the ideal phase difference value is located, the local recovery clock follows the phase difference with a minimum changing rate; and for segments farther apart from the ideal phase difference value, the local recovery clock follows the phase difference with a faster changing rate. The invention concerns non-error code and vibration minimization at the same time, so vibration tolerance is better raised, vibration transfer characteristic is very good, and net output vibration indicator at low band and high band parts is improved. <IMAGE>
申请公布号 AU3148201(A) 申请公布日期 2001.08.20
申请号 AU20010031482 申请日期 2001.01.20
申请人 HUAWEI TECHNOLOGIES CO., LTD. 发明人 TINGBO HE
分类号 H03L7/085;H03L7/099;H04J3/07 主分类号 H03L7/085
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