发明名称 METHOD AND DEVICE FOR CONTROLLING MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a memory controlling method and device capable of arbitrating various memory access requests by simple circuit constitution and reducing the deterioration of memory access performance. SOLUTION: An arbiter 6 arbitrates refresh requests, read/write requests, etc., respectively outputted from the masters of a refresh controller 2, write DMA controllers 3-1, 3-2, read DMA controllers 4-1, 4-2, and a CPU bus interface 5 on the basis of priority and refreshes a DRAM 10 during the execution of an interleaving operation where read operations and write operations are performed continuously.
申请公布号 JP2001222461(A) 申请公布日期 2001.08.17
申请号 JP20000030601 申请日期 2000.02.08
申请人 FUJI XEROX CO LTD 发明人 KOSEKI TOMIJI;SONOBE KENICHI;OUCHI ATSUSHI;TANAKA KOHEI
分类号 G11C11/407;G06F12/00;G11C11/406;(IPC1-7):G06F12/00 主分类号 G11C11/407
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