| 摘要 |
PURPOSE: A method for manufacturing a bit line is provided to stably guarantee contact resistance by preventing a bit line and a bit line contact from being misaligned in a process for forming the bit line. CONSTITUTION: The first etch stop layer, the first interlayer dielectric(302,308,312,316), the second etch stop layer, the second interlayer dielectric, the third etch stop layer, the third interlayer dielectric and the fourth etch stop layer are sequentially formed on a semiconductor substrate(300). The fourth etch stop layer, the third interlayer dielectric and the third etch stop layer are patterned to expose an upper surface of the second interlayer dielectric and to form a bit line pattern. Predetermined portions of the second interlayer dielectric and the second etch stop layer exposed to the inside of the bit line pattern are consecutively etched to form a bit line contact pattern. Insulating spacers are formed on the inner sidewalls of the bit line pattern and the bit line contact pattern. The second interlayer dielectric and the second etch stop layer exposed to the inside of the bit line pattern are etched to form a bit line groove while the first interlayer dielectric and the first etch stop layer are etched to expose a bit line contact pad(304) and to form a bit line contact hole. A conductive material is formed to fill the bit line groove and the bit line contact hole, and is blanket-etched to form a bit line contact and a bit line(508). A capping layer(510) is formed.
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