发明名称
摘要 <p>A shunt automatically controlled output circuit incorporating stored voltage or counter EMF loading, featuring serial incorporation of an isolation diode (CR100) way between a D.C power supply and a battery (B100) in which a voltage is stored, or a D.C motor (M100) bearing an armatured counter EMF, such that, once a loading which functions to store voltage as well such as a load in the form of a secondary cell (B100) or a capacitor or a super-capacitance capacitor (C100) or a D.C motor (M100) bearing a counter EMF by reason of its terminal voltage exceeds a predetermined threshold, the resistor (R101) that is shunted in parallel across the power supply will be made conductive by the load voltage testing circuit (VD100), whereby voltage on the power supply side is reduced, and that bringing about a cut in the voltage differential with respect to the loading terminal, so that power that is being delivered to the load is reduced in the long run. <IMAGE></p>
申请公布号 JP3079452(U) 申请公布日期 2001.08.17
申请号 JP20010000485U 申请日期 2001.02.06
申请人 发明人
分类号 H02J7/04;G05F1/46;H01M10/44;H02H9/04;H02J1/00;H02J7/00;H02M7/12;H02M7/217;H02P7/28;(IPC1-7):G05F1/613 主分类号 H02J7/04
代理机构 代理人
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