发明名称 |
Cache management for a multi-threaded processor |
摘要 |
A method and apparatus which provides a cache management policy for use with a cache memory for a multi-threaded processor. The cache memory is partitioned among a set of threads of the multi-threaded processor. When a cache miss occurs, a replacement line is selected in a partition of the cache memory which is allocated to the particular thread from which the access causing the cache miss originated, thereby preventing pollution to partitions belonging to other threads.
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申请公布号 |
US2001014931(A1) |
申请公布日期 |
2001.08.16 |
申请号 |
US20000732491 |
申请日期 |
2000.12.07 |
申请人 |
AGLIETTI ROBERT;GUPTA RAJIV |
发明人 |
AGLIETTI ROBERT;GUPTA RAJIV |
分类号 |
G06F12/08;G06F12/12;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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