| 摘要 |
A zero voltage switching synchronous rectification circuit for providing multiple output voltages from a single input voltage is disclosed. The circuit comprises a single transformer coupled to the single input voltage and at least two synchronous rectifiers, each of the at least two synchronous rectifiers being coupled to the transformer via a winding, each of the at least two synchronous rectifiers including a first controlled switching device coupled to the winding, wherein at least one of the at least two synchronous rectifiers includes a delay element, the delay element being coupled to the winding via the first controlled switching device, wherein the delay element delays the input voltage across the at least one of the at least two synchronous rectifiers for a predetermined amount of time. By incorporating a delay element with a plurality of isolated synchronous rectifiers, Zero Voltage Switching is achieved in a multiple output environment. This will improve the efficiency of multiple output circuits because the transistors will not incur the switching losses that are present in the operation of conventional synchronous rectification circuitry where a DC voltage is generated prior to generating a lower voltage output through synchronous rectification.
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