| 摘要 |
One embodiment of the present invention provides an apparatus that preserves ordering of memory requests distributed across multiple memory controllers. The apparatus includes a first memory controller containing a receiving circuit that is configured to receive a memory request that includes a source tag indicating a source from which the memory request originated. (For example, a source tag may identify a processor or a graphics accelerator.) The apparatus also includes a comparison circuit that compares the source tag with source tags for pending memory requests in a second memory controller to determine if the second memory controller contains any pending memory requests from the same source. Note that the source tags for the second memory controller are contained within a storage area in the first memory controller. The apparatus also includes a request order enforcement circuit that is configured to prevent the memory request from issuing from the first memory controller before the pending memory requests from the same source within the second memory controller complete. The apparatus additionally includes an issuing circuit that is configured to issue the memory request from the first memory controller to a first random access memory coupled to the first memory controller.
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