发明名称 Method for fabricating a semiconductor device including a latch-up preventing conductive layer
摘要 Provided with a semiconductor device which is adopted to reduce the resistance of a well without the need to increase the concentration of dopants in forming the well by depositing conductive layer patterns and then growing an epitaxial layer on the conductive layer patterns, the semiconductor device including: conductive layer patterns formed on a semiconductor substrate; a semiconductor layer formed on the semiconductor substrate and the conductive layer patterns; well regions formed in the semiconductor layer and the semiconductor substrate such that the conductive layer patterns are positioned at the bottoms of the well regions; and gate and source/drain electrodes formed on the well regions, and a method for fabricating the semiconductor device including the steps of: forming conductive layer patterns on a semiconductor substrate; forming a semiconductor layer on the semiconductor substrate including the conductive layer patterns; forming well regions in the semiconductor layer and the semiconductor substrate such that the conductive layer patterns are positioned at the bottom of the well regions; and forming gate and source/drain electrodes on the well regions.
申请公布号 US6274416(B1) 申请公布日期 2001.08.14
申请号 US19990241607 申请日期 1999.02.02
申请人 HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. 发明人 KIM DONG HOON;LEE JOONG JIN
分类号 H01L29/78;H01L21/28;H01L21/8238;H01L27/092;(IPC1-7):H01L21/823 主分类号 H01L29/78
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