发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To reduce irregularity of threshold voltage of a micronized MISFET. SOLUTION: A gate electrode 9a of the MISFET (Q1)is formed on a substrate 1 of an active region L whose periphery is regulated by an element isolating trench 2 and stretches from one end to the other end of the active region L intersecting it. The gate electrode 9a whose gate length in a boundary region between the active region L and element isolating trench 2 is greater than that in the central part of the active region L is constituted of an H-shaped plane pattern as a whole. The gate electrode 9a covers the whole of one edge along the gate lengthwise direction of the boundary region between the active region L and element isolating trench 2 and covers a part of two edges along the gate width direction. |
申请公布号 |
JP2001217325(A) |
申请公布日期 |
2001.08.10 |
申请号 |
JP20000024465 |
申请日期 |
2000.02.01 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
NISHIDA AKIO;YABUOSHI NORIYUKI;YOSHIDA YASUKO;KOMORI KAZUHIRO;TSUJI SOSUKE;MIWA HIDEO;HIGUCHI MITSUHIRO;IMATO KOICHI |
分类号 |
H01L21/8234;G11C11/412;H01L21/335;H01L21/8244;H01L27/088;H01L27/105;H01L27/11;H01L29/423 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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