| 摘要 |
PROBLEM TO BE SOLVED: To solve a problem that a processing unit can not have sufficient time for deciding an address of the next instruction to be returned from an instruction cache unit when a processing unit clock cycle is reduced. SOLUTION: A field of a program counter is made incremental during time for supplying speculative address of a next instruction field during a first clock cycle. The instruction field coinciding with the speculative address to be generated during the first clock cycle is accessed and supplied to a processor during a second clock cycle. The speculative address of the next instruction field is also decided during the second clock cycle and compared with the speculative address generated during the first cycle.
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