LOW DIELECTRIC CONSTANT SILICON OXIDE-BASED DIELECTRIC LAYER FOR INTEGRATED CIRCUIT STRUCTURE IMPROVED IN COMPATIBILITY WITH VIA FILLER MATERIAL, AND METHOD FOR MANUFACTURING THE SAME

摘要

PROBLEM TO BE SOLVED: To lower the capacitance between nearby conductive portions in an integrated circuit structure without contributing to via poisoning. SOLUTION: A first region between adjacent raised conductive lines formed over an underlying insulation layer comprises a carbon-containing low k silicon oxide dielectric material having a carbon content, capable of reducing undesirable capacitance that is horizontally formed between the adjacent raised conductive lines. A second region located above the raises conductive lines where vias are normally formed extending upward from the raised conductive lines to an overlying layer of metal interconnects comprises a carbon-containing low k silicon oxide having a carbon content, capable of inhibiting via poisoning of the vias in the dielectric material are provided.