SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREFOR

摘要

PROBLEM TO BE SOLVED: To use both the silicide technology and the SAC technology without adding a machining technology using a mask and without degrading device characteristics. SOLUTION: A silicide layer 5b is provided at the upper part of a gate electrode of a first n channel MISFETQ1 having a relatively short gate length and the entire upper surface of which is covered by a side wall spacer 8a1. A cap insulating film is constituted of the spacer. On the other hand, the silicide layer 5b is provided at the upper part of a gate electrode of a second n channel MISFETQ2 having a relatively long gate length and at a part of the upper surface of which, a side wall spacer 8b1 is formed to expose the silicide layer 5b.