发明名称 |
Individual source line to decrease column leakage |
摘要 |
A flash memory device and a method to read the flash memory device to decrease leakage current during read. The flash memory device has a source line control circuit connected to the sources of memory cells in a row and during read the source line control circuit connects the sources of the memory cells in a row to ground.
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申请公布号 |
US6272046(B1) |
申请公布日期 |
2001.08.07 |
申请号 |
US20000562748 |
申请日期 |
2000.05.02 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
SHIMADA HISAYUKI |
分类号 |
G11C16/26;(IPC1-7):G11C16/04 |
主分类号 |
G11C16/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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