发明名称 Precision low-noise current mode biasing scheme for BJT with inductive emitter degeneration
摘要 A low noise adaptive bias circuit is provided for a low noise bipolar junction input transistor having an emitter degeneration inductance, of an integrated high frequency functional circuit driven by the collector current of the input transistor. The bias circuit includes a shunt line connecting the base node of the input transistor to a first supply node of opposite sign of that of a second supply node to which is coupled, through the degeneration inductance, to the emitter of the input transistor. The shunt line includes a bias current generator dependent, in an inversely proportional manner, on the current gain of the input transistor, and a resistance dependent, in a directly proportional manner, on the current gain of the input transistor.
申请公布号 US6271695(B1) 申请公布日期 2001.08.07
申请号 US20000561101 申请日期 2000.04.28
申请人 STMICROELECTRONICS S.R.L. 发明人 GRAMEGNA GIUSEPPE;MAGAZZU' ANTONIO
分类号 H03F1/22;H03F1/30;H03F3/45;(IPC1-7):H03B1/00 主分类号 H03F1/22
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