| 摘要 |
A method for forming a DRAM cell with a crown full metal capacitor electrode with integrated selective tungsten contact hole. When the MOSFET devices are defined, a metal landing pad with Ti/TiN/W/TiN is first deposited and etched. After an insulating layer is deposited and node contact is formed, a CVD TiN layer is deposited and etched to form TiN spacers on the node contact sidewalls. Next, selective tungsten is formed in the node contact and use reactive ion etching to etch back. Thereafter, another insulating layer is deposited and the crown pattern opening is formed. Then, a TiN/W metal layer is deposited to serve as the bottom electrode of the stacked capacitor. After a photoresist layer is formed, then a chemical mechanical polishing method is used to remove portions of the photoresist layer and the TiN/W metal layer by using insulating layer as an polishing stop. The remaining photoresist and insulating layer are removed. Subsequently, a high dielectric film and another metal layer is deposited to complete the present invention. The process of the invention to fill the high aspect ratio node contact with selective tungsten and the stacked capacitor with metal electrode structure will provide a high reliability DRAM cell.
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