| 摘要 |
A fault tolerant clock system which employs a plurality of latches each of which is set to fault a clock signal upon the occurrence of one of a like plurality of anomalies and each of which can be independently reset so that the system can be started with asynchronous signals and so that, upon the removal of the anomalies, the latches can be reset to unfault previously faulted signals when the anomaly causing the fault has been cured.
|
