发明名称 METHOD TO ESTIMATE LOT PROCESSING COMPLETION TIME FOR SEMI-CONDUCTOR MANUFACTURING EQUIPMENT
摘要 <p>PROBLEM TO BE SOLVED: To provide a method that can estimate a complition time for semi-conductor manufacturing equipment to process one lot of boards before the boards are processed. SOLUTION: A process recipe of transportation process time, which transports processed matter 6a to 6c to each processing process and process processing process time which corresponds to the content of working processing conducting to processed matters is prepared. Then, the process time for each processed matter read out from the above processing recipe is dissolved into each transportation process time and process processing process time T5a to T5c. Individual dissolved process time is arranged on the single time axis in the manner that executable processings overlap each other in accordance with the processing procedure of processed matter. Thereby, the lot processing completion time is estimated based upon the process start time of processed matter 6a, which is, at first, processed in the lot and the processing completion time of processed matter, which is at last processed.</p>
申请公布号 JP2001209421(A) 申请公布日期 2001.08.03
申请号 JP20000016367 申请日期 2000.01.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TOIZUMI ATSUSHI;KUSUMOTO HIROSHI
分类号 G05B19/418;G06F17/00;G06Q10/04;G06Q50/00;G06Q50/04;H01L21/02;H01L21/66;H01L21/677;H01L21/68;(IPC1-7):G05B19/418;G06F17/60 主分类号 G05B19/418
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