| 摘要 |
PROBLEM TO BE SOLVED: To estimate a failure portion by making reference to circuit constitution of a gate expressed by a basic gate without preparing a data base exclusive for the failure estimation for the gate, in failure portion estimation for a logical circuit including the gate defined hierarchically. SOLUTION: An expected value setting means 23 finds an expected value of a logical circuit inside the objective gate by an implication operation in the output direction, a logical condition estimating means 24 finds a logical condition of the logical circuit inside the gate by an implication operation in an input and output direction, both thereof are compared to find a failure propagating route inside the gate, an input terminal of the gate serving as a tentatively determined object is retrieved in a tentative determination line retrieving means 25 by making reference to the circuit constitution of the gate recorded in a logical circuit constitution storage part 41 and the expected value and the logical condition of the gate in a logical condition storage part 42, and a related failure terminal in the input and output terminal of the objective gate is found in a related trouble terminal setting means 26 by making reference to the circuit constitution of the gate stored in the storage part 41 and the expected value and the logical condition of the gate stored in the storage part 42 a tentative determination line is not detected and when the gate is determined as a determined gate. |
