ARCHITECTURE OF CIPHERING CIRCUIT FREE OF PERFORMANCE LOSS AND ACTUALIZING CIPHERING ALGORITHM OF VARIOUS TYPES AT SAME TIME

摘要

PROBLEM TO BE SOLVED: To provide the architecture of a ciphering circuit which can be connected to a host system HS that an information processor accommodates and processes various ciphering algorithm at the same time while guaranteeing a certain bit rate for the algorithm. SOLUTION: The ciphering circuit 1 includes an input/output module 2 which serves to interchange data with the host system HS through a dedicated PCI bus, a ciphering module 3 which is connected to the input/output module 2 and ciphers, deciphers, and stores all secret information of the ciphering circuit, and an isolating means 4 between the input/output module 2 and ciphering module 3 which disables the host system HS to access the secret information stored in the ciphering module 3 and guarantees the parallelism of processes performed by the input/output module 2 and ciphering module 3. This is applied, specially, for safety by 'hardware' of a server or information processing station.