发明名称 HARDWARE AND SOFTWARE CO-VERIFICATION EMPLOYING DEFERRED SYNCHRONIZATION
摘要 Hardware and software of a system is co-verified with synchronization events generated in the respective hardware and software verifications being accumulated and provided to the other verification on a periodic basis. The faster verification is halted to allow the slower verification to catch up, upon expiration of a synchronization window. Once caught up, the accumulated synchronization events are provided to the respective other verification. The transferred synchronization events are then in turn injected into the other verification at the same offset time into a synchronization period the synchronization events occurred in the previous synchronization period.
申请公布号 US2001011210(A1) 申请公布日期 2001.08.02
申请号 US19980160368 申请日期 1998.09.24
申请人 BAILEY BRIAN 发明人 BAILEY BRIAN
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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