发明名称 |
VARIABLE LOGICAL CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
A semiconductor integrated circuit (FPLA) having a desired logical function achieved by arranging on a semiconductor chip variable logical circuits each having n x n (e.g., four) memory cells alternatively selected according to a combination of n (e.g., two) pairs of positive- and negative-phase signals and adapted to output positive- and negative-phase signals according to the data stored in the selected memory cell, variable wiring means provided with signal lines for interconnecting the variable logical circuits and switching elements for connecting/disconnecting signal lines intersecting each other, a wiring connection sate storage memory circuit where the states of the switching elements are stored.
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申请公布号 |
WO0156160(A1) |
申请公布日期 |
2001.08.02 |
申请号 |
WO2000JP00431 |
申请日期 |
2000.01.28 |
申请人 |
HITACHI, LTD.;SATOH, MASAYUKI;SHIMIZU, ISAO;TAKAHASHI, HIDEAKI;SAITOH, YOSHIKAZU |
发明人 |
SATOH, MASAYUKI;SHIMIZU, ISAO;TAKAHASHI, HIDEAKI;SAITOH, YOSHIKAZU |
分类号 |
G11C8/10;G11C29/02;H02M3/07;H03K19/177;(IPC1-7):H03K19/177;G06F11/22 |
主分类号 |
G11C8/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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