发明名称 AUTO-ALIGNING POWER TRANSISTOR PACKAGE
摘要 <p>An LDMOS power package includes a mounting substrate having a surface comprising one or more alignment elements, e.g., an etched marker line, raised abutment, or a trough, to provide for uniform positioning of semiconductor elements, e.g., the transistor die and matching input and output capacitors, in a large scale production. In one embodiment, the power package includes a conductive mounting flange having a surface, the flange surface comprising a plurality of alignment elements. An input matching capacitor is attached to the flange surface proximate a first alignment element. A semiconductor die having a plurality of transistor elements is attached to the flange surface proximate a second alignment element. An output matching capacitor is attached to the flange surface proximate a third alignment element.</p>
申请公布号 WO2001056082(A1) 申请公布日期 2001.08.02
申请号 US2001002167 申请日期 2001.01.22
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