| 摘要 |
<p>A semiconductor integrated circuit (FPLA) having a desired logical function achieved by arranging on a semiconductor chip variable logical circuits each having n x n (e.g., four) memory cells alternatively selected according to a combination of n (e.g., two) pairs of positive- and negative-phase signals and adapted to output positive- and negative-phase signals according to the data stored in the selected memory cell, variable wiring means provided with signal lines for interconnecting the variable logical circuits and switching elements for connecting/disconnecting signal lines intersecting each other, a wiring connection sate storage memory circuit where the states of the switching elements are stored.</p> |
