发明名称 Method and apparatus for parallel routing locking mechanism
摘要 A method for implementing net routing for an integrated circuit design with parallel processors, said method comprising the steps of creating a character array, filling said character array with a first character, dividing a plurality of nets into groups, supplying a plurality of locks and assigning each said group its own individual lock, assigning for each net in said plurality of nets a position in the character array; and placing a second character in the position of a particular net in said character array when the net is operated on by a processor and replacing said second character with the first character after said operation is completed.
申请公布号 US6269469(B1) 申请公布日期 2001.07.31
申请号 US19980062418 申请日期 1998.04.17
申请人 LSI LOGIC CORPORATION 发明人 PAVISIC IVAN;SCEPANOVIC RANKO;RASPOPOVIC PEDJA
分类号 G06F17/50;(IPC1-7):H03K17/693 主分类号 G06F17/50
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