Electrostatic discharge protection clamp for high-voltage power supply or I/O with nominal-voltage reference

摘要

An electrostatic discharge (ESD) protection technique protects a semiconductor device against electrostatic discharge events. The technique uses an ESD protection circuit that includes a two cascode-connected clamps between the protected pad and a reference voltage conductor and an level-shifting inverter amplifier for driving the clamps. A control signal used to control the amplifiers is derived from a nominal-voltage pad, but the voltage used to activate the transistor clamps is derived from the protected pad to achieve the greatest voltage drive on the cascoded clamps during ESD.