| 摘要 |
In an information processing apparatus, an interrupt control apparatus and method controls interrupt request inputs with respect to a processor. The interrupt control apparatus includes an interrupt flag holding circuit for holding a plurality of flags indicative of interrupt factors with respect to the respective interrupt request inputs and also holds a plurality of interrupt levels representative of priority orders of the interrupt request inputs. An interrupt level judging circuit judges an interrupt level having a top priority and also outputs an interrupt request to the processor. An interrupt vector generating circuit generates an interrupt vector in response to the held interrupt factor and an interrupt vector outputting circuit outputs the held interrupt vector to the processor. The processing operations by all of these circuits are carried out in a pipeline processing manner so that when an interrupt request having a higher interrupt level than that of an interrupt request under execution is issued, the processor interrupts the interrupt process operation under execution and executes an interrupt process operation for the higher interrupt level. When the interrupt process operation for the higher interrupt level is accomplished, the processor clears the interrupt level held in the interrupt level judging circuit and restarts the interrupt process operation for the lower interrupt level.
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