发明名称 Trench isolation method for semiconductor integrated circuit
摘要 A trench isolation method is provided for fabricating a semiconductor integrated circuit without a recessed groove that exposes the upper corner of the trench. A mask pattern is formed that exposes a predetermined area. A trench is etched through the mask pattern. Then a thermal oxide film is formed on the side walls and the bottom of the trench. A flowable oxide is then filled in the trench overflowing onto the mask pattern, and formed into a pattern. Then a surface of the flowable oxide film is etched until the mask pattern is exposed, thereby forming a flowable oxide film pattern. Then the exposed mask pattern is removed by a wet etchant, which also etches the flowable oxide film pattern, and thus forms a recessed groove. Then thermal annealing is performed, which eliminates the grooves, and forms an isolation film covering the upper corner of the trench. The thermal oxide film prevents impurities of the flowing oxide from diffusing into the substrate.
申请公布号 US6268265(B1) 申请公布日期 2001.07.31
申请号 US19990346450 申请日期 1999.07.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HWANG SUN-HA;SIMADA TAKASHI
分类号 H01L21/76;H01L21/316;H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址